1. Field of the Invention
The present invention relates to a circuit topology, and particularly to a circuit topology for multiple loads on a motherboard.
2. Description of Related Art
With the increasing speeds of integrated circuits (ICs), signal integrity is becoming one of the most pressing problem areas. Many factors, such as the parameters of the electrical elements of the PCB and the layout of the PCB, can affect the signal integrity, or lead to instability of the system, possibly even causing the system to breakdown. Thus, preserving signal integrity has become a key point in the design of a PCB.
Referring to FIG. 3, a conventional circuit topology coupling a driving terminal to four signal receiving terminals is shown. A driving terminal 10 is coupled to four signal receiving terminals 20, 30, 40, and 50 via corresponding transmission lines. The four signal receiving terminals 20, 30, 40, and 50 are connected together in a daisy-chain configuration. The daisy-chain configuration includes three connection points A, B, and C. In this circuit topology, the distance a signal travels from the driving terminal 10 to the signal receiving terminal 30 is greater than the distance the signal travels from the driving terminal 10 to the signal receiving terminals 20, 40, and 50.
Referring to FIG. 4, a graph illustrating signal waveforms 22, 33, 44, and 55 respectively obtained at receiving terminals 20, 30, 40, and 50 using the circuit topology of FIG. 3 is shown. Signals arriving at the receiving terminal 30 reflect back and forth along the transmission line causing “ringing” at receiving terminals 20, 40, and 50.
What is needed, therefore, is a circuit topology which can eliminate the signal reflections and enhance signal integrity.